Design Verification, Forward Deployed Engineering

About the Role

The role will begin with a strong emphasis on design verification expertise, evaluation curation, and technical leverage across deployments. Over time, you will grow into a broader Forward Deployed Engineering role, partnering directly with customers, shaping deployment strategy, building and iterating production-grade AI systems, driving technical workstreams, and helping turn high-touch semiconductor deployments into repeatable solutions.

The Forward Deployed Engineering team operates at the intersection of customer delivery and core platform development, embedding deeply with customers to translate frontier model capabilities into systems that materially reduce design cycles, improve verification quality, and accelerate innovation.

What You Will Do

• Serve as the design verification SME for semiconductor deployments, helping teams reason about verification workflows across block, subsystem, and SoC environments
• Shape AI-assisted workflows for test generation, regression triage, debug, root-cause analysis, and coverage closure
• Curate evaluations with FDEs and customer SMEs, including golden tasks, labeled examples, rubrics, acceptance criteria, and realistic benchmarks grounded in solved issues and real engineering workflows
• Build lightweight prototypes, eval harnesses, and tooling that validate opportunities and improve solution quality
• Educate and mentor the broader FDE team on verification concepts, tooling, and methodology so the org can engage semiconductor workflows with greater depth and confidence
• Partner with FDEs during customer discovery and scoping to translate ambiguous pain points into clear solution hypotheses, success criteria, and technical plans
• Support customer-facing technical conversations as a trusted advisor, engaging credibly with technical leaders
• Progressively take on broader FDE responsibilities, including customer discovery, solution architecture, prototype development, production deployment, and ownership of technical workstreams
• Collaborate with cross-functional teams to develop and implement AI-assisted design verification workflows
• Develop and maintain technical documentation for design verification workflows and methodologies

What We Are Looking For

• BS/MS in EE, CE, CS, or equivalent with 5+ years of experience in design verification for complex IP, subsystem, or SoC programs
• Demonstrated success verifying complex hardware systems in industry-standard flows, with deep familiarity in block-, subsystem-, and/or top-level verification methodologies
• Strong hands-on expertise in SystemVerilog, UVM, and common simulation/debug tools such as VCS, Questa, Verdi, or equivalent
• Strong understanding of constrained-random verification, directed testing, scoreboards, checkers, monitors, stimulus generation, regression infrastructure, and coverage analysis
• Strong knowledge of computer architecture, RTL/microarchitecture, memory systems, coherency, intercon
• Experience working with cross-functional teams, including engineering, product, and research teams
• Excellent communication and interpersonal skills, with the ability to work effectively with remote teams

Nice to Have

• Experience with AI-assisted design verification workflows and methodologies
• Knowledge of machine learning algorithms and their application to design verification
• Familiarity with cloud-based design verification platforms and tools
• Experience with agile development methodologies and version control systems such as Git

Benefits and Perks

• Competitive salary and benefits package
• Opportunity to work with a cutting-edge AI technology company
• Collaborative and dynamic work environment with a team of experienced engineers
• Professional development opportunities, including training and conference sponsorship
• Flexible remote work arrangements, with the option to work from anywhere
• Access to the latest design verification tools and technologies
• Recognition and reward for outstanding performance and contributions
• Comprehensive health insurance and wellness programs
• Generous paid time off and holidays

• Tip: Make sure to highlight your experience with design verification methodologies and tools, such as SystemVerilog and UVM, in your resume and cover letter.
• To stand out, be prepared to provide specific examples of your experience with AI-assisted design verification workflows and methodologies.
• When preparing for the interview, review the company's website and recent news articles to demonstrate your knowledge of their technology and mission.
• Be prepared to provide examples of your experience working with cross-functional teams, including engineering, product, and research teams.
• Consider creating a portfolio of your work, including examples of your design verification projects and any relevant tools or scripts you have developed.
• Tip: Don't be afraid to ask questions during the interview, such as what a typical day looks like in the role or what opportunities there are for professional development.
• Research the company's culture and values, and be prepared to discuss how your skills and experience align with their mission and goals.