Ethernet Host Adaptor ASIC Design Engineer

About the Role

The role entails collaborating with a talented team of architects, engineers, and business professionals who share a proven track record of building successful products and companies. With a global presence spanning multiple U.S. states and six countries, Cornelis Networks offers a dynamic and inclusive work environment that fosters growth and excellence.

What You Will Do

• Develop microarchitecture specifications for packet processor and high-speed pipelined data path designs for host ethernet adaptors emphasizing low-latency performance.
• Implement RTL designs using Verilog/System Verilog for high-speed data paths and packet processing logic.
• Collaborate with verification engineers to create block- and system-level test plans to ensure comprehensive design coverage.
• Define timing constraints for RTL blocks and work with Physical Design engineers to optimize timing closure.
• Support post-silicon validation, collaborating with hardware, firmware, and software teams to debug and resolve ASIC issues.
• Contribute to performance optimization and power-aware design strategies for Host Fabric Interface subsystems.
• Engage in system-level debug and root cause analysis of technical issues.
• Collaborate with cross-functional teams to ensure seamless integration of ASIC designs.
• Stay updated with the latest advancements in Ethernet protocols and ASIC design techniques.

What We Are Looking For

• B.S. or M.S. degree in Computer Engineering, Electrical Engineering, or a related field.
• 7+ years of post-college experience in digital design with proficiency in Verilog and System Verilog.
• Experience in RTL design for high-speed data paths or packet processing in ASICs.
• Deep understanding of Host Ethernet adaptor architectures.
• Familiarity with timing closure and modern physical design methodologies.
• Proven ability in system-level debug and root cause analysis of technical issues.
• Strong verbal and written communication skills.

Nice to Have

• Knowledge of Ethernet architecture and networking protocols.
• Prior experience with RTL development for Ethernet host adapters and system debug.
• Familiarity with AI and HPC datacenter technologies.

Benefits and Perks

• Competitive salary and benefits package.
• Opportunity to work with cutting-edge technology and contribute to the development of next-generation networking solutions.
• Collaborative and dynamic work environment with a team of talented professionals.
• Flexible remote work arrangements.
• Professional development opportunities.
• Access to the latest tools and technologies.

• Ensure your portfolio includes examples of your work in RTL design and system-level debug to stands out as a candidate.
• Familiarize yourself with Cornelis Networks' products and services to demonstrate your understanding of their technology and mission.
• Highlight your experience with Verilog and System Verilog, as well as your knowledge of Ethernet protocols.
• Be prepared to discuss your approach to system-level debug and root cause analysis during the interview.
• Research the company culture and values to understand how you can contribute to their collaborative and dynamic work environment.
• Consider reaching out to current or former employees to gain insights into the company's work environment and expectations.