Staff Digital Design Engineer - CPU Architecture & RISC-V (S)

About the Role

The role entails driving architectural decisions, RTL development, and SoC integration, ensuring comprehensive testing and validation of CPU IP. Your expertise in RISC-V instruction sets and extensions will be instrumental in translating high-level architectural requirements into detailed micro-architectural specifications for CPU designs.

Innatera's team is shaping the future of AI hardware, and your work will contribute to creating solutions that power intelligent systems. The company's commitment to innovation and excellence makes this role an exciting opportunity for those passionate about digital design and CPU architecture.

What You Will Do

• Design and architect advanced CPU cores and micro-architectures, with particular expertise in RISC-V instruction sets and extensions
• Translate high-level architectural requirements into detailed micro-architectural specifications for CPU designs
• Collaborate with verification engineers to ensure comprehensive testing and validation of CPU IP, including instruction set compliance and performance
• Define and implement SoC-level architectures, specifically focusing on the integration of CPU cores and their interaction with other IP and subsystems
• Assist in verifying SoC functionality through top-level testing, ensuring robust system performance, especially regarding CPU operation
• Perform RTL coding and debugging of CPU cores and related logic using Verilog or System Verilog
• Conduct RTL and gate-level simulations to ensure design accuracy and performance for CPU and associated logic
• Execute all front-end design tasks for CPU cores, including synthesis, STA, formal equivalence checking
• Support software-hardware co-design efforts, demonstrating a deep understanding of the SW-HW system and its interaction with the CPU
• Drive the development of innovative CPU IP concepts based on high-level product specifications, exploring new architectural paradigms
• Evaluate, customize, and integrate third-party CPU IP or components to enhance system performance

What We Are Looking For

• 7+ years of experience in digital design, with a strong focus on CPU architecture and micro-architecture development
• Demonstrable experience in designing and implementing RISC-V based CPU cores
• Deep understanding of CPU pipeline stages, memory hierarchies, interrupt handling, and bus interfaces related to CPU design
• Expertise in RTL coding and debugging for complex digital modules, particularly CPU designs
• Strong knowledge of SoC architecture and subsystem integration, specifically concerning CPU integration
• Proven experience in front-end design tasks for CPU cores, including synthesis, STA, and formal equivalence checking
• Solid understanding of digital verification methodologies and working collaboratively with verification teams
• Familiarity with common communication protocols relevant to CPU-to-system interfaces

Nice to Have

• Experience with software-hardware co-design efforts
• Knowledge of neuromorphic SoCs and their applications
• Familiarity with agile development methodologies

Benefits and Perks

• Opportunity to work on cutting-edge AI hardware
• Collaborative and dynamic work environment
• Professional development and growth opportunities
• Flexible remote work arrangements
• Access to cutting-edge tools and technologies
• Competitive compensation package

• Ensure you have a strong portfolio showcasing your experience in CPU architecture and RISC-V.
• Familiarize yourself with Innatera's products and mission to demonstrate your passion for the company.
• Highlight your problem-solving skills and attention to detail, as these are crucial for success in this role.
• Be prepared to discuss your experience with RTL coding, synthesis, and verification methodologies.
• Show enthusiasm for innovation and exploring new architectural paradigms.
• Research the market to negotiate a competitive salary and benefits package.
• Look for red flags such as lack of clear communication or unrealistic expectations during the interview process.